1. Field of the Invention
The present invention relates to light valves, and in particular, to a light valve pixel cell possessing enhanced storage capacitance.
2. Description of the Related Art
Liquid crystal displays (LCDs) are becoming increasingly prevalent in high-density projection display devices. These display devices typically include a light source which passes light through a light valve.
One of the methods for producing colors in a liquid crystal display is to sequentially project light having a wavelength corresponding to a primary color onto a single light valve. Color sequential light valves create a spectrum of color within the range of the human perception by switching between a set of discrete primary colors. Typically, red, green, and blue are the primary tri-stimulus colors used to create the remaining colors of the spectrum.
Specifically, during projection of each primary color, the light intensity is modulated such that combination of the intensities of the primary colors in sequence produces the desired color. The frequency of switching between the primary wavelengths by the light valve should be sufficiently rapid to render discrete primary states indistinguishable to the human eye.
Two factors dictate the minimum frequency necessary for switching. The first factor is the ability of the human eye to detect the discrete primary colors (e.g., red, green, blue). At slower than ideal switching speeds, the human eye will detect a flicker and the primaries may not blend.
The second factor determining the frequency of switching is the video refresh rate. During display of video images, the individual frames must be refreshed at frequencies undetectable to the human eye.
The net frequency of switching demanded by the combination of sequential color blending and video refreshing is beyond the capabilities of light valves that utilize thick ( greater than 1 xcexcm) liquid crystal (LC) transducers. However, thin ( less than 1 xcexcm) liquid crystal transducers have been successfully fabricated. These thin LC transducers demonstrate adequate color sequential blending at video refresh rates. One example of such a thin LC transducer pixel cell structure is disclosed in U.S. Pat. No. 5,706,067, to Colgan et al.
In general, the conventional thin LC transducer pixel cells possess enhanced responsiveness due to the decreased volume of liquid crystal material between the top and bottom plates. A smaller volume enables the liquid crystal to shift orientation more quickly and in response to a lower applied voltage.
FIG. 1A shows a plan view of adjacent thin LC transducer pixel cells in a conventional light valve. FIG. 1B shows a cross-sectional view of the adjacent pixel cells of FIG. 1A across line A-Axe2x80x2. Light valve portion 100 comprises adjacent pixel cells 110a and 110b having liquid crystal (LC) material 111 sandwiched within gap 106 between a top plate and a bottom plate. The top plate is composed of a translucent material, typically glass. The underside of the top plate is coated with optically transparent and electrically conducting material, typically indium-tin oxide (ITO). This conductive layer serves as a passive electrode for the active pixels below. This passive electrode layer also typically bears a polyimide layer, which is scored to provide an anchoring alignment for the LC material 111.
The bottom plate of the pixel cell is formed by the active reflective metal pixel electrodes 112a and 112b of adjacent pixels 110a and 110b, respectively. Pixel electrodes 112a and 112b are separated and electrically isolated by trenches 118.
A reflectance enhancing coating (REC) 116 is formed over pixel electrodes 112a and 112b. REC 116 consists of optically transparent dielectric films 116a whose thickness and composition are specifically tailored to generate constructive interference of light reflected by electrodes 112a and 112b. The function and creation of such a REC is described in detail in co-pending U.S. patent application Ser. No. 08/872,013 (xe2x80x9cthe ""013 applicationxe2x80x9d) entitled xe2x80x9cREFLECTANCE ENHANCING THIN FILM STACKxe2x80x9d, filed Jun. 7, 1997 and hereby incorporated by reference. The ""013 application describes one particularly effective embodiment of a REC that consists of alternating silicon oxide and silicon nitride films. Therefore, the REC shown in FIG. 1B includes two sets of oxide-nitride films.
Pixel electrodes 112a and 112b lie on top of an upper intermetal dielectric layer 128 that forms a component of interconnect scheme 104. Interconnect 104 overlies capacitor structures 120a and 120b formed within underlying silicon substrate 105. Capacitor structures 120 include a dielectric layer 162 formed over a double diffused drain (DDD) region 160 created within silicon substrate 105. Capacitor structures 120 further include a polysilicon contact component 164 formed over dielectric layer 162.
Storage capacitors 120a and 120b are in electrical communication with pixel electrodes 112a and 112b, respectively, through metal-filled vias 140, middle interconnect metallization layer 124, and lower interconnect metallization layer 122. Storage capacitors 120a and 120b are controlled by MOS switching transistors 142a and 142b, respectively. MOS switching transistors 142a and 142b are also formed in underlying silicon substrate 105, and are electrically isolated from adjacent semiconducting devices by trench isolation structures 144.
Operation of the conventional pixel cell is described below in conjunction with FIGS. 1A-1B and FIG. 1C. FIG. 1C depicts a circuit diagram representing the electrical behavior of conventional pixel cell 110a. 
At the commencement of a write cycle for pixel 110a, gate 146a of MOS switching transistor 142a receives a select voltage (Vselect) through first portion 122a of lower interconnect metallization 122. Vselect activates MOS switching transistor 142a, permitting a video voltage signal (Vvideo) appearing at drain 148a of MOS switching transistor 142a from second portion 122b of lower interconnect metallization 122 to be transmitted to capacitor structure 120a through channel 150a and source 152a of transistor 142a. Vvideo is in turn transmitted through interconnect 104 to active electrode 112a, causing overlying LC material 111 to exhibit a particular transmission.
The light valve then addresses the next pixel cell 110b. The Vselect voltage is no longer applied to gate 146a of MOS switching transistor 142a, and the Vvideo voltage is no longer applied to drain 148a. However, Vvideo is maintained on active pixel electrode 112a by storage capacitor 120a, until the next write cycle occurs.
FIG. 1C shows that there are actually two capacitive components present in conventional pixel cell 110a. The first capacitive component is storage capacitor 120a created by DDD 160, dielectric layer 162, and polysilicon element 164. The second capacitive component of conventional pixel cell 110a is formed by combination of REC 116 and the LC material 111 itself, which form a dielectric between active electrode 112a and the overlying passive electrode.
The conventional pixel cell described above in FIGS. 1A-1C functions adequately in many applications. However, this design suffers from a number of disadvantages.
One problem is that light incident to array 100 may penetrate through gap between adjacent pixel electrodes 112a and 112b. Intermetal dielectric layer 128 below trench 118 is substantially transparent to this incident light, which next encounters middle interconnect metallization layer 124. Metallization layer 124 likely bears an anti-reflective coating as a result of prior photolithographic steps. As a result, light incident to inter-pixel regions is absorbed rather than reflected, and is perceived by a viewer as a dark line. This dark inter-pixel region contrasts with the bright surrounding reflective pixel electrodes. Projection displays can magnify the light reflected from pixel array to such an extent that the non-reflective space between pixels is readily observable and may distort the image.
Therefore, there is a need in the art for a pixel cell and a process of forming a pixel cell having inter-pixel regions which exhibit reflectance comparable to that of pixel regions.
Another problem associated with the conventional pixel cell design is flickering of the image due to fluctuation in the bias of the active electrode between successive write states.
One cause of flicker is a decline in voltage of the active pixel electrode due to current leakage between successive write states. Current leakage can arise from a number of sources.
One prominent leakage current path is between the source of the MOS switching transistor and the grounded DDD component of the adjacent storage capacitor. This leakage path is particularly problematic where LOCOS isolation is created between these structures. Another important leakage current path is between the source of the MOS switching transistor and the substrate under reverse bias conditions.
A third significant leakage current path is across the LC material itself. Recall from FIG. 1C that the LC material forms a dielectric between the charged active and passive electrodes. The LC material is primarily nonconductive. However, the LC material contains mobile ions which migrate to the surfaces of the active and passive pixel electrodes when the LC is subjected to an electric field. This migration of mobile ions can prevent a static voltage from being applied across the thickness of the LC material. Application of a non-static voltage across the LC produces changed optical transmission that is manifested as flickering.
Therefore, there is a need in the art for a pixel cell and a process for forming a pixel cell which minimizes flickering due to current leakage in the pixel cell circuit.
Another source of image flicker is the appearance of DC offset voltage across the liquid crystal material. Because of certain physical properties of LC material, LC displays typically alternate between positive and negative biases of equivalent magnitudes over successive write states.
In the conventional pixel cell shown in FIGS. 1A-1C, the layers of material enclosing the LC are not symmetrical. Specifically, the LC is sandwiched between an active electrode composed of a reflective metal, and a passive electrode composed of an optically transparent material such as ITO. This asymmetry in orientation of material boundaries around the LC gives rise to a DC offset voltage across the LC. This DC offset voltage can disturb the equivalency in magnitude of the positive and negative biases applied to the active electrode over successive write states. This bias variation at the electrode can in turn cause flickering of the image.
Therefore, there is a need in the art for a pixel cell and a process for forming a pixel cell which prevents flickering due to a DC offset voltage across the LC material.
An additional problem with the conventional LC pixel cell is that the intervening REC between the active pixel electrodes and the LC material increases the necessary voltage to induce a change in orientation of the overlying LC. This increased voltage requirement means that the underlying switching transistors must be capable of withstanding the high voltages, complicating fabrication and increasing the cost of the device.
Therefore, there is a need in the art for a pixel cell and a process of forming a pixel cell that places the electrically conducting active pixel electrode as close as possible to the overlying LC in order to reduce the voltage requirements of the cell.
A further problem with the conventional LC pixel cell is the space occupied by the device. Because of intrinsic limitations in the permitivity of the dielectric material formed between the DDD region and the polysilicon element, the storage capacitor structure depicted in FIG. 1B occupies large amounts of silicon substrate surface area. This space consumption is amplified by utilization of many individual pixel cells to form an array.
Therefore, there is a need in the art for a pixel cell and a process of forming a pixel cell which occupies a smaller surface area.
The present invention provides a pixel cell and a process flow for forming a pixel cell that features a plurality of transparent conductive pixel electrodes formed over a grounded reflective metal backplane. Intervening between the electrodes and the backplane is a reflectance enhancing coating generating constructive interference of incident light reflected by the underlying backplane. This pixel cell architecture enhances the storage capacitance of the pixels by creating capacitive coupling between the active electrode and the grounded metal backplane. The pixel cell of the present invention also reduces the incidence of dark lines associated with non-reflective inter-pixel regions, lowers voltage requirements, and prevents flickering attributable to asymmetrical orientation of different material layers about the LC.
A process flow for forming a pixel cell in accordance with one embodiment of the present invention comprises the steps of forming an intermetal dielectric layer, and forming a first via and a second via through the intermetal dielectric layer. The first via is filled with electrically conducting material to form a first via plug, the first via plug in electrical communication with an underlying capacitor structure. The second via is filled with electrically conducting material to form second via plug, the second via plug in electrical communication with a ground. A reflective metal layer is formed over the intermetal dielectric layer. The reflective metal layer is etched to form a non-grounded metal portion in contact with the first via plug and a grounded reflective metal surface in contact with the second via plug. A dielectric layer is formed over the grounded reflective metal surface and the non-grounded metal portion. A third via is formed through the dielectric layer. The third via is filled with electrically conducting material to form a third via plug, the third via plug in electrical contact with the non-grounded metal portion. An optically transparent electrically conducting pixel electrode is formed on top of the dielectric layer and in electrical contact with the third via plug.
A pixel cell in accordance with one embodiment of the present invention comprises an intermetal dielectric layer having a first via and a second via filled with electrically conducting material, the first filled via in electrical communication with an underlying capacitor structure and the second filled via in electrical communication with a ground. A reflective metal backplane is positioned on top of the intermetal dielectric layer, the reflective metal backplane including a non-grounded metal portion in electrical contact with the first filled via and a grounded reflective metal surface in contact with the second filled via. A dielectric layer is positioned on top of the reflective metal backplane, the dielectric layer including a third via filled with electrically conducting material. A transparent electrically conducting pixel electrode is positioned over the dielectric layer and in electrical contact with the third filled via.
The features and advantages of the present invention will be understood upon consideration of the following detailed description of the invention and the accompanying drawings.